S40B Datasheet | Mitsubishi Electric

PC133 SDRAM (Rev.0.5) Oct. '99 64M bit Synchronous DRAM M2V64S20BTP-6 (4-BANK x 4194304-WORD x 4-BIT) M2V64S30BTP-6 (4-BANK x 2097152-WORD x 8-BIT) M2V64S40BTP-6 (4-BANK x 1048576-WORD x 16-BIT) MITSUBISHI LSIs PRELIMINARY Some of contents are described for general products and are subject to change without notice. DESCRIPTION M2V64S20BTP is organized as 4-bank x4,194,304-word x 4-bit,and M2V64S30BTP is organized as 4-bank x 2097152-word x 8-bit ,and M2V64S40BTP is organized as 4-bank x 1048576-word x 16-bit Synchronous DRAM with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK. M2V64S20BTP,M2V64S30BTP,M2V64S40BTP achieves very high speed data rates up...